skip to main content
資源種類 顯示結果: 顯示結果: 查詢種類 索引

適用於雙輸出可程式化邏輯陣列的技術映射 = Technology Mapping for Dual-Output LUT-Based FPGAs

鄭晉昌 國立臺南大學 資訊工程學系碩士班. 2023[民112]

可在 府城總館  2樓參考書區  (DC CSIE 111007 )取得(請點選下列選項)

  • 題名:
    適用於雙輸出可程式化邏輯陣列的技術映射 = Technology Mapping for Dual-Output LUT-Based FPGAs
  • 著者: 鄭晉昌
  • 國立臺南大學 資訊工程學系碩士班.
  • 主題: 可程式化邏輯陣列; FPGA
  • 描述: 在當今的可規劃邏輯陣列 (Field Programmable Gate Array, 簡稱FPGA) 的市場中,配備有雙輸出查值表 (Lookup Table, 簡稱 LUT)已然佔據領導地位。相較於傳統僅配備單輸出查值表,配備雙輸出查值表的優勢在於,在滿足與輸入相關的限制下,其查值表可彈性地以一個大尺寸的查值表運作或分解為兩個小尺寸的查值表。 在傳統那些運用於植基於查值表的可規劃邏輯陣列 (LUT-Based FPGAs) 之電腦輔助設計流程中,技術映射階段 (一個攸關數位電路最終所占用的面積、延遲的多寡、消耗的能源與可繞線度的階段) 所產生的網表 (netlist) 僅包含單輸出查值表。然而,傳統的流程並未考慮「雙輸出查值表」的架構。有鑑於此,為了讓時下主流的可規劃邏輯陣列能發揮其應有的能力,我們需要搭載雙輸出查值表的可規劃邏輯陣列的電腦輔助設計。 本論文提出兩個單輸出查表合併到一個雙輸出查表的演算法。實驗結果顯示,我們所提出的演算法能減少電路所需的面積。
    In the Field Programmable Gate Array (FPGA) market, models that feature dual-output lookup table (LUT) now predominate. The advantage of dual-output LUT lies in its flexibility because, under input-related constraints, it can act as either one large-sized LUT or two small-sized LUTs. In an ordinary computer-aided design (CAD) flow for LUT-based FPGAs, a netlist of single-output LUTs is produced following the technology mapping phase, a phase that is critical in a digital circuit’s area usage, delay (electricity traveling distance, i.e. performance), power consumption, and routability. Nevertheless, such an ordinary CAD flow assumes that FPGAs only being equipped with single-output LUT, hence the flow does not take into account modern FPGAs’ native dual-output LUTs. This can lead a modern FPGA to underachieve in its designed capability of adapting performance, power consumption, and routability. As a result, in order to find ways to help modern FPGA models attain their full potential, many CAD flows and algorithms that target the FPGAs with in-built dual-output LUTs have been widely proposed. And in this dissertation, we present algorithms to generate single-output LUTs and pack two single-output LUTs into one dual-output LUT. Experimental results show that our proposed algorithms need less area compared to the other methods.
  • 出版者: 碩士論文--國立臺南大學資訊工程學系碩士班.
  • 建立日期: 2023[民112]
  • 格式: [15],36頁 : 圖,表 ; 30公分..
  • 語言: 英文
  • 資源來源: NUTN ALEPH

正在檢索遠程資料庫,請稍等